A PCB (Printed Circuit Board) is the structural backbone and vascular system of any electronic product. Every chip and component connects through copper traces on the PCB, forming a complete working system.
Typical consumer electronics — smartphones, routers, smart speakers — generally use 4- to 8-layer PCBs, which suffice for the vast majority of everyday applications.
But when signal rates exceed 10 Gbps, when chip pin density reaches hundreds of pads per square millimeter, and when the system must simultaneously handle hundreds of high-speed differential pairs, even 4, 8, or 16 layers simply aren't enough.
That's when you need "high-layer-count boards" — typically 20 layers and above.
Imagine a 56-story building where every floor is packed with pipes and wiring, and each floor's infrastructure must align perfectly with the floors above and below — with tolerances measured in single-digit micrometers. A deviation on any single floor could paralyze the entire building's transportation system.
This is the core challenge of high-layer-count PCB design.
A 56-layer board means 56 individual signal, power, and ground layers must be laminated together. Each layer's alignment accuracy must be held within ±25 μm. Exceed this tolerance and vias will miss their targets, breaking inter-layer electrical connections.
To put this in perspective: a human hair is approximately 70 μm in diameter. That means alignment precision must reach one-third the width of a human hair.
The insulating dielectric (prepreg) between each layer is typically 50–100 μm thick. In a 56-layer board, dielectric uniformity directly affects impedance consistency for high-speed signals. Any sudden impedance change causes signal reflections, leading to bit errors or even total system failure.
During lamination of a 56-layer board, resin flow, curing temperature, and pressure distribution all require precise control. Any non-uniformity can cause layer shift, blistering, or delamination defects. A single lamination cycle error could result in hundreds of thousands of RMB in scrapped material.
56-layer boards invariably involve high-speed signal design. A 28 Gbps PAM4 signal has a Nyquist frequency of 14 GHz, and its wavelength in FR-4 material is only about 10 mm. Every via, every corner, every impedance discontinuity can degrade signal quality.
Engineers must simultaneously manage hundreds of high-speed differential pairs, ensuring length matching, consistent spacing, and intact reference planes. This isn't simple "trace routing" — it's electromagnetic field simulation and optimization at the millimeter scale.
Client Requirement: 52-layer PCB carrying 16 channels of 28 Gbps SerDes signals, with total aggregate bandwidth exceeding 400 Gbps.
Core Challenges:
Solution:
Result: Eye diagram opening exceeded template requirements by 1.5×; system BER below 10⁻¹².
Client Requirement: 48-layer PCB mixing high-speed signals (25 Gbps) and high-precision analog signals (24-bit ADC).
Core Challenges:
Solution:
Many clients ask us: "How do you guarantee zero data loss at 28 Gbps?"
The core measures can be summarized as follows:
The impedance of 28 Gbps signals must be controlled within 100Ω ±5%. This demands precise calculation and control of the PCB stackup structure, copper thickness, and dielectric constant. We use tools like SI9000 for impedance simulation during design and verify through TDR (Time Domain Reflectometry) measurements during manufacturing.
Vias are the "bottleneck" in high-speed signal transmission. Each via introduces parasitic capacitance and inductance, causing signal reflections. We optimize through:
The length difference between the positive and negative lines within a differential pair must be controlled within ±5 mil. For multi-channel systems, inter-channel matching requirements are even more stringent.
Spacing between high-speed signals must be at least 3× the trace width. In space-constrained areas, ground guard traces are added to reduce crosstalk.
Power supply noise for high-speed ICs must be kept within allowable limits. We ensure power system stability through proper decoupling capacitor placement and PDN impedance simulation.
Xi'an Qiyun Zhixun Electronic Technology Co., Ltd. specializes in custom hardware development for consumer and industrial applications, with extensive experience in high-layer-count board design and high-speed signal design.
If you're looking for a technically competent and experienced hardware partner, we'd love to hear from you.
Xi'an Qiyun Zhixun Electronic Technology Co., Ltd. specializes in PCB integrated board hardware/software development, embedded Linux/Android system development, FPGA/DSP/ARM high-speed product development, test fixture development, serial/CAN communication development, IoT and wireless product development, medical electronics, automotive electronics, and industrial control products. We provide one-stop hardware customization services from design to mass production.
Tel: +86-29-88857718 | Email: tq@qiyunzhixun.com
Website: www.qiyunzhixun.com